Publication2024
Leveraging ReRAM Sequence Graphs for Efficient Mapping of Binary Adders in ReRAM Crossbars
The record
- Type
- Publication
- Date
- 1 January 2024
- Level
- National
- Journal
- 2024 28th International Symposium on VLSI Design and Test Vdat 2024
- Published
- 1 January 2024
- DOI
- 10.1109/vdat63601.2024.10705713
- Scopus ID
- 85207826241
- Authors
- 4
- Open access
- No
- Citations
- 0
- International co-authorship
- No
- Co-author countries
- IN
Classification
Every label below carries the reasoning it was assigned on, the confidence band it was assigned in, and what produced it. The rubric is published.
UN Sustainable Development Goals
9.5 Enhance scientific research, upgrade technological capabilities, and increase researchers and R&D spending
ReRAM sequence graph methodology optimizes binary adder implementation in resistive random access memory crossbars, reducing device utilization and read-write cycles.
- Moderate confidence
- The alignment is plausible and defensible but rests on an assumption a reasonable reviewer could decline. Published, and surfaced in the review queue for a human to confirm or override.
- Judged
- Judged against the published classification rubric, under the rubric and prompt versions recorded with the run that produced it.
- Produced by
- claude-haiku-4-5-20251001, under kortex-publication-v1
Viksit Bharat @2047
vb-3.2 Digital technology and artificial intelligence
In-memory computing research advancing digital technology and semiconductor architecture innovation.
- Produced by
- claude-haiku-4-5-20251001, under kortex-publication-v1
Each label above carries the instrument and the version that produced it. How each classification is reached.
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- 1
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Citing this record
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KIIT Deemed to be University. “Leveraging ReRAM Sequence Graphs for Efficient Mapping of Binary Adders in ReRAM Crossbars”. Kortex.