Publication2016
Design of a high speed and low area latch-based comparator in 90-nm CMOS technology having low offset voltage
- Industry, Innovation and Infrastructure
- Innovation, Science and Technology
The record
- Type
- Publication
- Date
- 1 July 2016
- Level
- National
- Journal
- International Conference on Energy Systems and Applications Icesa 2015
- Pages
- 628-631
- Published
- 1 July 2016
- DOI
- 10.1109/icesa.2015.7503425
- Scopus ID
- 84979743580
- Authors
- 3
- Open access
- No
- Citations
- 7
- International co-authorship
- No
- Co-author countries
- IN
Classification
Every label below carries the reasoning it was assigned on, the confidence band it was assigned in, and what produced it. The rubric is published.
UN Sustainable Development Goals
9.5 Enhance scientific research, upgrade technological capabilities, and increase researchers and R&D spending
Design of latch-based comparator in 90-nm CMOS achieves high speed, low area, and minimal offset voltage for analog-to-digital conversion applications requiring precision signal processing.
- Moderate confidence
- The alignment is plausible and defensible but rests on an assumption a reasonable reviewer could decline. Published, and surfaced in the review queue for a human to confirm or override.
- Judged
- Judged against the published classification rubric, under the rubric and prompt versions recorded with the run that produced it.
- Produced by
- claude-haiku-4-5-20251001, under kortex-publication-v1
Viksit Bharat @2047
vb-3 Innovation, Science and Technology
Derived through the seeded SDG-to-Viksit-Bharat crosswalk from the primary SDG 9 label. Design of latch-based comparator in 90-nm CMOS achieves high speed, low area, and minimal offset voltage for analog-to-digital conversion applications requiring precision signal processing.
- Produced by
- claude-haiku-4-5-20251001, under kortex-publication-v1
Each label above carries the instrument and the version that produced it. How each classification is reached.
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- 1
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Citing this record
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KIIT Deemed to be University. “Design of a high speed and low area latch-based comparator in 90-nm CMOS technology having low offset voltage”. Kortex.