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by IQAC KIITKIIT Deemed to be University — Internal Quality Assurance Cell

Publication2026

Design and System Level Validation of a Truth Table Synthesized 18 Transistor Full Adder for Binary Accumulation Application

The record

Type
Publication
Date
1 January 2026
Level
International — held abroad
Journal
Proceedings of the 18th International Conference on Electronics Computers and Artificial Intelligence Ecai 2026
Published
1 January 2026
DOI
10.1109/ecai69016.2026.11613780
Scopus ID
105046602903
Authors
5
Open access
No
Citations
0
International co-authorship
Yes
Co-author countries
IN, RO

Classification

Every label below carries the reasoning it was assigned on, the confidence band it was assigned in, and what produced it. The rubric is published.

UN Sustainable Development Goals

  1. 9.5 Enhance scientific research, upgrade technological capabilities, and increase researchers and R&D spending

    TargetPrimaryHigh confidenceJudged

    Truth-table-synthesized 18-transistor full adder design reduces circuit complexity and transistor count compared to conventional 28-transistor designs while maintaining correct logical functions for arithmetic operations.

    High confidence
    The subject matter is a strong and direct inference from the record type, the funding or organising body, or the programme context, even where the title alone is thin. Example: an ICMR-funded project against SDG 3, on the strength of the agency.
    Judged
    Judged against the published classification rubric, under the rubric and prompt versions recorded with the run that produced it.
    Produced by
    claude-haiku-4-5-20251001, under kortex-publication-v1

  2. 17.6 Enhance North-South, South-South and triangular cooperation on science, technology and innovation, and knowledge sharing

    TargetSecondaryHigh confidenceRule-derivedrule sdg17-structural-v1

    Structural signal: co-authorship outside India.

    Rule-derived
    Emitted by a deterministic rule from structural signals rather than judged from the record’s text. The rule carries a version, so rule-derived and judged labels stay separable.
    Produced by
    sdg17-structural-v1, under kortex-publication-v1

Viksit Bharat @2047

  1. vb-3.2 Digital technology and artificial intelligence

    Sub-themePrimaryHigh confidenceJudged

    VLSI circuit design innovation for compact full adder architecture supports digital technology advancement with applications in biometric systems and binary neural network hardware acceleration.

    Produced by
    claude-haiku-4-5-20251001, under kortex-publication-v1

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KIIT Deemed to be University. “Design and System Level Validation of a Truth Table Synthesized 18 Transistor Full Adder for Binary Accumulation Application”. Kortex.

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